Duration: 36 months
The infrared Focal Plane Array (FPA) operated at cryogenic temperatures is a key part of the imaging system. It is composed of a pixelised sensing layer covering spectral bands in the range of 0.7 to 30 µm which is hybridized onto a silicon Readout Integrated Circuit (ROIC). The role of the ROIC fabricated with a CMOS technology is to convert IR optical flux to video signal. The ROIC analog part is designed with mixed signal technology allowing the use of relatively high voltage (compared to fully digital technology) in order to improve detector performances. This makes the circuit sensitive to Hot Carrier Injection which degrades the device performances along time. The HCI degradation is well modeled at room temperature. However, at cryogenic temperature, this degradation is accentuated and no degradation model exists. This PhD project, proposed by ISAE-SUPAERO and Airbus DS, will investigate the HCI effect on ROIC according to these main axes: · Better mastering HCI effects on cooled space IR detectors would therefore be very valuable, on the one hand via the development of a model for degradation prediction and on the other hand by validating mitigation techniques able to reduce HCI impacts on CMOS ROIC reliability. · HCI causes called electroluminescence which can add-up to the charges collected during integration time and bias measurements leading to glow and the blooming. · HCI phenomenon can also impact the Random Telegraph Noise (RTN) behavior. In the past two years, only works on CMOS image Sensors for visible wavelengths at room temperature have been done to explore this impact and no exploration has been noted for IR FPA at cryogenic temperatures. The objectives of the PhD research project will be to increase knowledge on HCI effects at cryogenic temperature and define mitigation techniques to reduce HCI impacts on ROIC based on the expertise and characterization facilities of Airbus DS, ESA and ISAE-SUPAERO.
