Today, spacecrafts require and increasing amount of computing power for a next generation of communication systems and intelligent space missions. In the near-future many systems will rely on complex algorithms and AI which require massive amounts of on-board processing power. However, high performance computers in ground applications are sensitive to radiation-induced errors. The main goal of this project is to develop a new novel error tolerant processor with improved execution performance without compromising reliability due to radiation, bringing high performance computing from ground to space without major overhead. The proposed project is a collaboration between KU Leuven University and Cobham Gaisler, focusing on the emerging open RISC-V processor architecture. The usage of open processors has been successful for ESA with 1000’s of processors flying in space today, using SPARC architectures. However, the limited community reduces the future availability of resources and support for this architecture. In contrast, RISC-V is emerging quickly, leading to a wide community driving its developments. The novel idea in this project is a new soft-error mitigation technique that is based on an error detection mechanism instead of an error correcting implementation at the core of the processor. Nowadays, digital logic is protected from ionizing radiation by using self-correcting redundancy or error filtering techniques that slow down the execution capacity. By only detecting the occurrence of an error and re-playing faulty instructions, the additional overhead of soft-error mitigation techniques to the performance is significantly reduced. The implementations will be done in the state-of-the-art 22 nm FDX technology, recently introduced as a promising candidate for next-generation silicon space technology. The implementation of this research project combines 3 novel state-of-the-art advancements for space applications: RISC-V, 22 nm FDX and new re-playing pipelines.
